In the manufacture of VLSI semiconductor devices, multilevel interconnects are made to increase the packing density of devices on a wafer. This also requires multilevel dielectric layers to be deposited between conductive layers. Such dielectric layers must have good step coverage and planarization properties to produce void-free layers that not only completely fill steps and openings in the underlying substrate, but also form smooth planarized dielectric layers. Further such dielectric layers must be able to be deposited at low temperatures, preferably below about 400.degree. C., to avoid damage to underlying, already formed interconnects.
It is known that silicon oxide dielectric layers can be deposited with good conformality and planarization using tetraethylorthosilane (hereinafter TEOS), ozone and oxygen at comparatively low temperatures, e.g., about 375.degree. C. These layers can be formed at atmospheric pressure and at slightly subatmospheric pressure These silicon oxide layers are referred to as thermal CVD silicon oxide layers. It is also known that the ratio of TEOS and ozone affects the film quality and deposition rate. For example, when depositing silicon oxide from TEOS and ozone using a high ozone:TEOS flow ratio, the rate of deposition is reduced, but the film quality is higher and conformality, i.e., the ability to produce void-free filling and planarized layers, is also higher. The layers provide good step coverage and good conformality which leads to excellent planarization, and excellent quality of the silicon oxide when deposited onto silicon.
However, when the thermal silicon oxide is deposited onto other silicon oxide layers, for example a plasma enhanced silicon oxide layer (PECVD) which can be deposited at high deposition rates, reduction in film quality has been noted. The quality of low temperature silicon oxide films from TEOS and ozone deposited onto PECVD silicon oxide is lower, and the wet etch rate of the thermal silicon oxide is high, which indicates poor quality films. Furthermore, the surface of the thermal silicon oxide is very rough and contains voids, indicating formation of a porous film.
Fujino et al, J. Electrochem. Soc. Vol 138, No. 2, Feb. 91, pp 550-553, have addressed this problem. Their solution is a two step thermal deposition process; first a deposit of silicon oxide using a low ozone concentration (0.5%) is put down, and a second layer deposited thereover using a high ozone concentration (5%). The result is said to be improved film quality of silicon oxide planarizing films.
However, this ozone-TEOS silicon oxide layer still has limitations in terms of poor surface quality and surface sensitivity. The higher the ozone:TEOS ratio, the greater the decrease in oxide deposition rate, and the greater the degradation in film properties, such as wet etch rate, wafer resistance and stress drift with time.
Bang et al in copending U.S. application Ser. No. 07/896,296 filed Jun. 10, 1992, have also addressed this problem; they developed a two step process which produced silicon oxide layers with reduced surface sensitivity and excellent film qualities and improved conformality of silicon oxide films to produce void-free films over submicron sized topography. This process comprises depositing a first seed layer of a nitrogen-doped PECVD TEOS silicon oxide and depositing thereover a second layer of silicon oxide in a non-plasma thermal process using high pressure and high ozone:TEOS flow ratios. However, this process requires two different gas streams. A method of achieving like results but without having to change deposition gas streams would be highly desirable.